June,2001

At a time when the embedded systems industry is struggling to keep pace with the verification tasks required for any system, Beach Solutions relieves a significant part of this burden with a new member of its EASI-GEN™ family of products. EASI-Checker™ automatically creates all bus-interface test routines for each address-mapped IP block in a system directly from the hardware specification. This ensures the IP-Bus interfaces are fully exercised, with totally reliable, documented and maintainable test suites. All generated tests are then re-usable in subsequent SoC implementations utilising those IP blocks.

Equivalent tests, which are generated from one common reference, are produced in C, VHDL and Verilog; this allows the same tests that are run on a standalone IP block to be compiled and run on the processor or model of the final integrated system.

Tool Features:

• Automatic code generation in C, VHDL and Verilog to check out an entire SoC address map.

• Works in synchronisation with Beach Solutions' other automatic generators within the EASI family, including generation of device documentation, device driver code (in C), bus interfaces in RTL with associated synthesis scripts and IP test benches - all at the touch of one button!
• Fully configurable, with the ability to generate tests for:
  • Bitfield and Register integrity
  • Read-Only and Write-only tests for Bitfields and Registers
  • Verification of Power On Reset values
  • Bitfield exclusivity and Register exclusivity
  • Memory integrity
  • Correct address line sequencing
  • Error reporting/traps
• A full Test report document produced

EASI-Checker™ control panel:

EASI (Embedded Application System Interfaces™) family overview.

EASI-Tools™ for IP and SoC development include generators of comprehensive and documented C libraries for test and firmware development, hardware reference manuals (in RTF and HTML) and bus interfaces in both VHDL and Verilog. Automating the creation of these components gives immense savings in design engineering resources, support effort and time. This also avoids the problems that frequently creep in at the hardware-software interface using traditional manual methods.

As all generated components are derived from one common electronic specification, design consistency is assured. Extensive checking at the time of data entry ensures all information is consistent and free from errors. Support for design data import and export is provided using XML, giving an open interface for inter-operability with other leading industry tools.

EASI-Tools™ are useful for hardware developers performing block or system design and test, software developers wanting a clean, reliable programming interface to hardware devices, and those creating design documentation. The tools are suitable for PLD, ASIC, ASSP and standard product embedded designs.

Beach Solutions will be demonstrating its new EASI-Checker™ product together with the rest of the EASI-GEN™ family at booth #218, DAC in Las Vegas on June 18th-20th 2001.

For further information or please email info@beachsolutions.com , or visit the web site www.beachsolutions.com

Embedded Application System Interfaces (EASI's), EASI-GEN, EASI-Tools, and EASI-Checker are trademarks of Beach Solutions Ltd. All others trademarks or registered trademarks are the property of their respective owners.

Further editorial notes:
Beach Solutions is a 5-year-old embedded systems consultancy and tools company with its headquarters registered in Great Chesterford, Cambridge, UK. It has extensive experience in embedded system hardware and software design including automatic generation, modelling and simulation technologies. More information can be found at www.beachsolutions.com.